ERIKA Enterprise Forums

I’m doing a graduation project on synchronization protocols on a multi-core.
The goal is to measure the overhead of several MSRP-based algorithms.
For our project, we therefore would like to use an ERIKA Enterprise operating system,

In the wiki online the hardware designs for Altera Stratix 2s60 is given.
It's not posible to buy a board with the Stratix II chip anymore.
Would any cyclone II or Stratix III board be suited to put the given hardware design on?
Could you suggest some boards to get a working ported OS.
And / or give hardware designs on other boards/ ways to get it working?

Many thanks,
Maikel

The current status is as follows:

- Nios II has been supported up to Nios II IDE 8.1.
- there is an archived 4 core design on the wiki from where you can start from.
- the 4 core design I remember was using 16-20k logic elements, so any FPGA >20KLE should work for a 4 core design. I suggest to start with the examples provided with the board and enlarge them.
- If you have to do performance measurements on a Nios II I suggest to get some kind of tracer. In 2009 I used Lauterbach T32, and there is in the design an additional block that helps the tracer getting out the data. (The probe is now at the Retis lab in Pisa)

The best thing would be to port what we have now to the new version of Nios II. I never had the time to do that, also because Altera is releasing a new version every 6 month, and it is hard to keep up with the changes not having a lot of people using it everyday. If you are interested in doing that, I can give you some more details (on a confcall)

I hope it helps...

PJ