AVR8

From ERIKA WIKI
Revision as of 12:38, 20 December 2017 by G.serano (talk | contribs) (→‎MEGA Family)
Jump to: navigation, search

Introduction

Embedded microcontroller units are spreading in thousands of applications, ranging from single to distributed systems, control applications, multimedia, communication, medical applications and many others. Modern microcontrollers, which are growing in computational power, speed and interfacing capabilities, are more and more feeling the need of tools to make the development of complex scalable applications easier.

This manual describes the porting details of the ERIKA Enterprise v3 kernel(s) for the Atmel families of microcontrollers which supports 8/16-bit RISC AVR cores (aka AVR8).

ERIKA Enterprise v3 and RT-Druid v3 for AVR8

Embedded applications often require tight control on the temporal behavior of each single activity in the system. Real-time complex system systems such as Wireless Sensor Networks are nowadays deployed in academic and industrial environments. The very limited set of resources available in the popular hardware platforms, and the diversified domains of WSN applications, require the adoption of an Operating System responding to the following pre-requisites:

  • minimum footprint to fit the limited RAM capacity (of the order of few KB);
  • tunable scheduling algorithm to handle the execution of the tasks;
  • an application interface acting on the kernel layer and well decoupled from OS service implementation.

ERIKA Enterprise v3 and RT-Druid v3 represent the answer of Evidence Srl for the development of scalable real-time applications for AVR8.

ERIKA Enterprise v3 provides AVR8 developers the following features:

  • Traditional RTOS features:
    • Support for four conformance classes to match different application requirements;
    • Support for preemptive and non-preemptive multitasking;
    • Support for fixed priority scheduling;
    • Support for stack sharing techniques, and one-shot task model to reduce the overall stack usage;
    • Support for shared resources;
    • Support for periodic activations using Alarms;
    • Support for centralized Error Handling;
    • Support for hook functions before and after each context switch.
  • RT-Druid development environment
    • Development environment based on the Eclipse IDE;
    • Support for the OIL language for the specification of the RTOS configuration;
    • Graphical configuration plugin to easily generate the OIL configuration file and to easily configure the RTOS parameters;
    • Full integration with the Cygwin development environment to provide a Unix-style scripting environment;
    • Apache ANT scripting support for code generation.
  • AVR8 integration features

Integration with other tools for AVR8

ERIKA Enterprise and RT-Druid aims to the best integration with the existing tools for development available from the AVR microcontrollers. RT-Druid will be used to quickly configure the application, setting temporal parameters of real-time tasks, memory requirements, stack allocation and many other parameters. Moreover, RT-Druid generates the application template, and leaves the developer the task to implement the logic of each single task. While programming the application, the developer can exploit the power and flexibility offered by the primitives of the ERIKA Enterprise real-time kernel. ERIKA Enterprise also supports the compiling environments provided by Atmel, providing also direct support for the programming and JTAG solutions of Atmel.

Content of this document

The purpose of this document is to describe all the information needed to create, develop and modify an Erika Enterprise application for the AVR family of microcontrollers.

In particular, the document describes:

  • The design flow which should be used to generate an Erika Enterprise application;
  • The configuration of the development environment;
  • The options which are available to configure the system.

As a final note, all the settings which are explained in this document apply both to Erika Enterprise if not otherwise stated. 

Note: If you are looking for a step-by-step / quick guide tutorial on how to use Erika Enterprise and RT-Druid with AVR,
please read the “Erika Enterprise Tutorial for the AVR microcontrollers”, available for download on the Evidence Web site.


Configuration and Programming

ERIKA Enterprise is configured through RT-Druid and an OIL file. Here are listed, after the information to set compiler path, the OIL fields customized for Atmel AVR8 architecture.

Compiler Path

It is possible to choose the path of the compiler in three different ways:

  • PATH enviornment variable: You can put compilers bin directories in PATH and the environmet can use them from here.
  • Compiler specific environment variables:
    • AVR8 GCC toolchain: You can specify the compiler path for AVR8 GCC with the AVR_TOOLS.
  • RT-Druid configuration file see RT-Druid configuration#Compiler paths:
    • preference_avr8__path_for_gcc_compiler set GCC compiler path for AVR8

Here is an example of RT-Druid configuration file.

CPU

CPU_DATA must be set to AVR8.

Example of a CPU_DATA section: 

   CPU_DATA = AVR8 {
     ...
   };

MCU

MCU_DATA supports for now the MEGA value only.

MODEL attribute of MCU_DATA supports for now the MEGA_328p value only. 

 MCU_DATA = MEGA {
   MODEL = MEGA_328p;
 };

BOARD

There is no board support for now.

Interrupt Handling

MEGA Family

The MEGA family of AVR8 microcontrollers has an interrupt vector table which is stored in the flash memory. The lowest addresses of the interrupt vector table is allocated to the RESET and to the interrupt vectors. Interrupt handlers placed at lower addresses have higher hardware priorities than interrupt handlers placed at higher addresses so the PRIORITY attribute of the ISR object in the OIL is USELESS. The complete list of SOURCE entries is shown below.

  • RESET: External Pin, Power-on Reset, Brown-out Reset and Watchdog System Reset
  • INT0: External Interrupt Request 0
  • INT1: External Interrupt Request 1
  • PCINT0: Pin Change Interrupt Request 0
  • PCINT1: Pin Change Interrupt Request 1
  • PCINT2: Pin Change Interrupt Request 2
  • WDT: Watchdog Time-out Interrupt
  • TIMER2_COMPA: Timer/Counter2 Compare Match A
  • TIMER2_COMPB: Timer/Counter2 Compare Match B
  • TIMER2_OVF: Timer/Counter2 Overflow
  • TIMER1_CAPT: Timer/Counter1 Capture Event
  • TIMER1_COMPA: Timer/Counter1 Compare Match A
  • TIMER1_COMPB: Timer/Coutner1 Compare Match B
  • TIMER1_OVF: Timer/Counter1 Overflow
  • TIMER0_COMPA: Timer/Counter0 Compare Match A
  • TIMER0_COMPB: Timer/Counter0 Compare Match B
  • TIMER0_OVF: Timer/Counter0 Overflow
  • SPI_STC: SPI Serial Transfer Complete
  • USART_RX: USART Rx Complete
  • USART_UDRE: USART, Data Register Empty
  • USART_TX: USART, Tx Complete
  • ADC_ADC: Conversion Complete
  • EE_READY: EEPROM Ready
  • ANALOG_COMP: Analog Comparator
  • TWI: 2-wire Serial Interface
  • SPM_READY: Store Program Memory Ready

Trap Handling

With TriCore AURIX, for the first time, we support the options to register handler for TRAP/Exceptions. OSEK OIL do not provide any field for trap handling: it suppose that all the handling is done inside the Kernel. Usually that's what happens, but sometime can be useful have some mechanism to attach an handler for a particular class of TRAPs.

We decide to exetend ISR entry with the field TRAP that can be set to TRUE to enable TRAP handling. In this case you have to choose the TRAP class with the field LEVEL (or ENTRY). The only valid values for this configuration are:

  • TRAP_MMU (Actually useless because TC27x and TC26x families don't have MMU, just a place holder)
  • TRAP_PROT (Handler for protection traps)
  • TRAP_INST (Handler for instructions traps)
  • TRAP_CONT (Handler for context traps)
  • TRAP_BUS (Handler forn bus traps)
  • TRAP_ASS (Handler for assertion traps) (please don't be silly :))
  • TRAP_SYS (Handler for system calls)
  • TRAP_NMI (Handler for NMI trap)

OIL TRAP configuration example: 

 ISR trap_context {
     LEVEL = "TRAP_CONT";
     HANDLER = "EE_trap_context";   //Trap handler
     TRAP = TRUE;
 };

To define the handler in your code, you have to use the following syntax: 

 TRAP(EE_CLASS_TRAPCONT, EE_trap_context) {
   while(1) {
     ; /* dummy */
   }
 }

TRAP class identifiers are the following:

  • EE_CLASS_TRAPMMU
  • EE_CLASS_TRAPPROT
  • EE_CLASS_TRAPINST
  • EE_CLASS_TRAPCONT
  • EE_CLASS_TRAPBUS
  • EE_CLASS_TRAPASS
  • EE_CLASS_TRAPSYS
  • EE_CLASS_TRAPNMI

Inside the TRAP handler TIN (Trap Identification Number) value can be accessed with EE_tc_get_TIN() function or, for HIGHTEC GNUC Compiler, with the local variable tin. For more information you can check the $(ee)/pkg/cpu/tricore/inc/ee_tc_trap.h file.

EEOPT

EEOPT is a way to specify configuration flags to the Erika build environment. EEOPTs can be specified as strings in the OS section of the OIL file. Examples: 

EE_OPT = "EE_DEBUG";
EE_OPT = "__ASSERT__";

Please notice that spelling inside the OIL file includes an underscore: EE_OPT.

The only supported format for EEOPTs is a single name, which should be a valid C identifier (i.e., only Latin letters, digits, and underscore are allowed; the first character cannot be a digit). And any other format is not supported, and even if it works now, it may break in the future.

The following EEOPTs are specific of AURIX Architecture:

  • EE_DEBUG: Replace the often used DEBUG option (because it conflict with compilers DEBUG define). Enable debug compiler options, basically less optimization and debug symbols generation plus defualt TRAP handlers are implemented as busy loops instead of system reset.
  • EE_EXECUTE_FROM_RAM: When specified, a linker script is used that maps both code and data in the RAM space. Executables produced with this option can be used only together with a debugger that loads the program in memory. By default, code and constant data are mapped to Flash, data to RAM.
  • EE_SAVE_TEMP_FILES: Enable temporary files saving for the compiler, useful to debug build process and to inspect generate assembly code. It's useful only for HIGHTEC GCC compiler because for TASKING compiler is always active. For the GCC compiler it has been added the switch because the size of temporary files is huge.
  • EE_ICACHE_ENABLED: Enable the instruction cache in start-up code.
  • EE_DCACHE_ENABLED: Enable data cache in start-up code

OSEK/VDX Extensions

This Section contains information about the OSEK/VDX Extensions (or optional features) that have been implemented for the AURIX support.

Resource Managament at ISR level

This feauture is automatically enabled by RT-Druid during the configuration generation step. To specify that a Resource is used by both a Task and a ISR you need to add that resource to the corrisponding ISR object as follows: 

 TASK Task1 {
   ...
   RESOURCE = "ResourceA";
 };
 
 ISR <SYMBOL> {
   PRIORITY = <PRIORITY_LEVEL>;
   CATEGORY = <ISR_TYPE>;
   RESOURCE = "ResourceA";
 };
 
 RESOURCE ResourceA { RESOURCEPROPERTY = STANDARD; };

System Timer

The OSEK/VDX standard provides support for a System Counter (a counter that is automatically linked to a hardware timer). The System Timer is used to give a coherent timing reference across the entire application.

In ERIKA Enterprise, this special counter has been named System Timer. To use it, you need to set a specific attribute in a Counter definition. Please note that only one counter for each core can be the System Timer.

A Counter which is not a System Counter must be incremented explicitly using the Autosar primitive IncrementCounter.

The following is an example OIL definition for a System Counter: 

 CPU_DATA = TRICORE{
   CPU_CLOCK = 200.0;
   ...
 };
 
 COUNTER SystemTimer {
   MINCYCLE = 1;
   MAXALLOWEDVALUE = 2147483647;
   TICKSPERBASE = 1;
   TYPE = HARDWARE {
     DEVICE = "STM_SR0";
     SYSTEM_TIMER = TRUE;
     PRIORITY = 1;
   };
   SECONDSPERTICK = 0.001;
 };

The meaning of the various attributes is as follows:

  • CPU_DATA/CPU_CLOCK is used to declare the clock frequency (in MHZ).
  • COUNTER/TYPE must be set to HARDWARE, and SYSTEM_TIMER must be set to true.
  • COUNTER/TYPE/DEVICE must be a valid device that can be used for a system timer. Currently, for TRICORE only STM (System Timer Module) MCU peripheral is a valid device for system timer. Both Interrupt source of this peripheral can be set to device and allowed values are STM_SR0 and STM_SR1
  • COUNTER/TYPE/PRIORITY By default SYSTEM_TIMER is tied to smallest ISR priority (i.e. PRIORITY = 1;), but it can be overritten. Ovveride is necessay in multicore environment because priority 1 is used by the Intercore Interrupt Request.
  • COUNTER/SECONDSPERTICK is used to declare the wanted time duration of one hardware tick in seconds.

The System Timer can be attached to ALARMs as usual, as in the following example: 

 ALARM AlarmExample {
   COUNTER = SystemTimer;
   ACTION  = ACTIVATETASK{
      TASK = TaskExample;
   };
 };

CPU MCU & BOARD API

In addition to AUTOSAR OS Kernel Interface, in ERIKA AURIX porting are implemented a bunch of utility functions that will be considered as part of ERIKA API. As usual they are separated in the three logical layer that compose ERIKA architecture abstraction: CPU, MCU & BOARD.

CPU API

CPU layer represent all the behaviour shared between all the families of AURIX MCUs. In this layer are declared the functions to temporary disable ENDINIT and SAFETY_ENDINIT register protection (see Infineon AURIX documentation). These functions are a little bit tricky: declaration belong to CPU layer, because AURIX architecture documentation states that every AURIX implementation has some kind of ENDINIT and SAFETY_ENDINIT protection, but delegate implementation details to each AURIX family, so functions definitions has been done inside MCU files.

  • void EE_tc_endint_disable( void ): Temporary disable ENDINT protection.
  • void EE_tc_endint_enable( void ): Re-enable ENDINT protection.
  • void EE_tc_safety_endinit_disable( void ): Temporary disable SAFETY_ENDINIT protection.
  • void EE_tc_safety_endinit_enable( void ): Re-enable SAFETY_ENDINIT protection.

MCU API

MCU layer represent the behaviour tied to an specific AURIX family of MCUs. For now only family TC27x is supported. Most part of the utilities belong to this layer:

  • void EE_tc2Yx_get_clock ( void ): Return CPU clock frequency in HZ.
  • void EE_tc2Yx_configure_clock( EE_UREG fclock ): Make the best effort to set CPU clock frequency to fclock value. It's the function used by StartOS when a CPU_CLOCK is configured in CPU_DATA.
  • void EE_tc2Yx_delay ( EE_UREG usec ): Implement a busy loop wait of usec micorseconds.
  • void EE_tc2Yx_stm_set_sr0( EE_UINT32 usec, EE_TYPEISR2PRIO intvec ): Programs STM compare register 0 to trigger an IRQ after usec microseconds. intvec is the priority tied to this source, in other words it is the Interrupt Vector Table entry that will handle STM interrupt. With intvec == 0, the correponding service request node is left unprogrammed or resetted.
  • void EE_tc2Yx_stm_set_sr0_next_match( EE_UINT32 usec ): Change previous programmed STM compare register 0 to trigger next IRQ after usec microseconds. To mantain fixed interrupt interval, it have to been called at the beginning of intvec handler.
  • void EE_tc2Yx_stm_set_sr1( EE_UINT32 usec, EE_TYPEISR2PRIO intvec ): Programs STM compare register 1 to trigger an IRQ after usec microseconds. intvec is the priority tied to this source, in other words it is the Interrupt Vector Table entry that will handle STM interrupt. With intvec == 0, the correponding service request node is left unprogrammed or resetted.
  • void EE_tc2Yx_stm_set_sr1_next_match( EE_UINT32 usec ): Change previous programmed STM compare register 1 to trigger next IRQ after usec microseconds. To mantain fixed interrupt interval, it have to been called at the beginning of intvec handler.

SR0 and SR1 API are both available to the user if System Timer is not configured. Otherwise only the one not used by system timer will be available.

Board API

BOARD layer represent the specific board support. There is only aminimal support for TriBoard TC2x5 v2.0 equiped with a TC275TE MCU:

  • void EE_tc2x5_leds_init( void ): Initialize the 8 boards leds.
  • void EE_tc2x5_leds_on( void ): Turns all the 8 leds.
  • void EE_tc2x5_leds_off( void ): Turns off all the 8 leds.
  • void EE_tc2x5_turn_led(enum EE_tc2x5_led_id led_id, enum EE_tc2x5_led_status onoff): Turn the status of the led led_id (led IDs are collected in an enum in the form: EE_TRIBOARD_2X5_LED_{x} with {x}=[1..8]) on (onoff == EE_TRIBOARD_2X5_LED_ON) or off (onoff == EE_TRIBOARD_2X5_LED_OFF).
  • EE_BIT EE_tc2x5_read_button( void ): read external button value
  • void EE_tc2x5_button_irq_init( EE_TYPEISR2PRIO intvec ): Configure the external button has an interrupt source and tie it to intvec priority handler.
  • void EE_tc2x5_button_irq_clear_request( void ): Clear external button interrupt request.

External button have to be connected to pin P15.8 on TC275TE corrisponding to pin 71 of PERIPHERALS (Xx02,Xx02) connector of TriBoard TC2x5.

Debugger support

Multicore Autosar OS Support

For details please see the following page: Erika AUTOSAR OS

Build Multicore Application Single ELF with HighTec GCC Compiler

The conventional ERIKA multicore build chain generate an ELF file for each core and the real application image is loaded on the device by Lauterbach, trought scripts. This approach is not straightforwardly portable on other programmer tools. Fortunately HighTec GCC Compiler has some peculiar features that have allowed us to change this approach, and for TriCore is possible to compile a Multicore Application contained in a single ELF.

To enable this new build method add the following EEOPT=EE_BUILD_SINGLE_ELF to the project OIL file.

To export some symbols from a core an HighTec GCC export file is needed. An HighTec export file looks like this: 

 EXPORT FUNCTION _START ;
 EXPORT FUNCTION ErrorHook ;
 EXPORT FUNCTION StartupHook ;
 EXPORT FUNCTION ShutdownHook ;
 
 EXPORT OBJECT EE_oo_ErrorHook_ServiceID ;
 EXPORT OBJECT EE_oo_ErrorHook_data ;
 
 ...

To inform the build system to use an export file for a given core change the COMPILER_TYPE field of CPU_DATA OIL container, in the following way: 

 CPU_DATA = TRICORE {
   ID = "master";
   ...
   COMPILER_TYPE = GNU {
     EXPORT_FILE = "<relative path to the export file>";
   };
   ...
  };

If this is done add explicitly EEOPT=EE_BUILD_SINGLE_ELF is no more needed.

N.B: When used this approach an export files for the master core have to be provided always. The file can be empty if no symbols have to be exported by master core.

This build approach is showed on following RT-Druid TriCore templates:

tricore/infineon_TriBoard-TC2X5_V2.0/Multicore automatic tests/Multicore System StartUp test

tricore/infineon_TriBoard-TC2X5_V2.0/Multicore automatic tests/Multicore Spinlocks test

Additional Notes

Since ERIKA 2.4.0 full AUTOSAR SC4 OS support for AURIX is publically released: you can find all the information about the implemented features and how to configure them at this page: Erika AUTOSAR OS.

Retrieved from "http://www.erika-enterprise.com/wiki/index.php?title=AVR8&oldid=39"